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Hi All,

Here's a new DCS thing for this month. It's a DCS detector that flashes when the engine and TIU communicate.

Just two alligator clips to the track (the power supply is inside) and that's it. 

It's using all the FPGA stuff I posted before and makes the light flash whenever the spread-code is successfully detected more than 10 times (seemed like a nice round number). Since it's actually like doing the CDMA decoding, not just measuring voltage or something silly.... it's a pretty easy and effective layout troubleshooting tool.

I thought about putting a "quality scale" or something and ranking the packet quality based on how many CDMA chip bits are correct of the 31 PN sequence and then weighting it by how many codes were sent, but that seemed complicated, so I just made the the Cx threshold 1 bit higher than the DS/SS demodulator train (28/31 instead of 26/31 that MTH uses). So if it sees 10 codes with >27/31 confidence each, it flashes once.

Fun and useful!

~Adrian

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DCS Detector
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GGG posted:

So you physically move the box where you want it?   Or you can drive an engine around the layout at 3-5SMPH and test with a numerical read out.  Then repeat at mainline speeds.

So what is the advantage of the box?  G

Well the short answer is there's a lot more to a layout than track... TIUs, wiring, breakout terminals... that you may want to look at. The other interesting thing is you can change the confidence threshold on the decoder (Cx) to be higher than the MTH engines so you're testing with margin underneath.

Adrian! posted:
Daniel Auger posted:

Hi Adrian,

Interesting device !  Will you share the final H/W and S/W details here ?  That would be appreciated, in case someone would like to make one.

Thanks !

Daniel

The H/W & S/W is exactly what's in the spoofing post, just soldered together instead of on a breadboard.

In your other post it appears your FPGA H/W uses the $99 Arty evaluation board.

Setup

So this evaluation board, AC-to-DC power supply, your filtering circuit, etc. all fit in the tiny detector box you show above?  I think someone trying to duplicate this would need a bit more detail.

Also, could you share specifically how you use it as a troubleshooting tool relative to, say, existing methods using the built-in DCS TIU signal quality function (reporting 0 to 10) or something ad hoc like sending music to an engine over the track using the DCS Protocast function and listening for audio disruptions as the train traverses the layout.

In the TMCC world there was a long thread about a signal detector that you dragged around on a flatcar or whatever.  As I recall it's not so much the construction of the tool, but rather how to apply it as a troubleshooting tool.

Your ideas are very inspired and interesting.

 

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  • Setup
stan2004 posted:

n your other post it appears your FPGA H/W uses the $99 Arty evaluation board.

Setup

So this evaluation board, AC-to-DC power supply, your filtering circuit, etc. all fit in the tiny detector box you show above?  I think someone trying to duplicate this would need a bit more detail.

Also, could you share specifically how you use it as a troubleshooting tool relative to, say, existing methods using the built-in DCS TIU signal quality function (reporting 0 to 10) or something ad hoc like sending music to an engine over the track using the DCS Protocast function and listening for audio disruptions as the train traverses the layout.

In the TMCC world there was a long thread about a signal detector that you dragged around on a flatcar or whatever.  As I recall it's not so much the construction of the tool, but rather how to apply it as a troubleshooting tool.

Your ideas are very inspired and interesting.

 

Hey there,

You can get a smaller versions of the ARTY board like the one I used (FPGA)  which helps make it fit in the box. The supply I used was this one (supply) with the heat sink shaved a bit to fit in the box. Circuitry and verilog code is pretty-much the same.

The existing signal quality function is a bit limited, it only looks at the success or failure of n packets and doesn't get into how many spread sequence chips are correct or not within each (which I think is a better indicator of signal quality since it captures transient interference, not just static problems like low voltage). Also it only works on tracks since it's inside the engine. The original motivation was  to build a simple tool that I could check wires and blocks under the layout (as I build them) to make sure there is enough signal margin. Since the decoder has a higher correctness threshold than the engine, it means there is margin over the quality of signal the engine needs.

I wanted to do something more complicated like plot a histogram of the signal statistics, but that would require a display. I'm thinking maybe a raspberry pi with a tablet or something connected to the FPGA. Maybe another projected for next month.  Having a display makes it hard to use when crawling around under the table too

 

~Adrian

Adrian! posted:
GGG posted:

So you physically move the box where you want it?   Or you can drive an engine around the layout at 3-5SMPH and test with a numerical read out.  Then repeat at mainline speeds.

So what is the advantage of the box?  G

Well the short answer is there's a lot more to a layout than track... TIUs, wiring, breakout terminals... that you may want to look at. The other interesting thing is you can change the confidence threshold on the decoder (Cx) to be higher than the MTH engines so you're testing with margin underneath.

The engine is the end user, so if it test fine moving around layout your ok.  Obviously a bad TIU shows up pretty easily.  Not sure how wire is an issue.  But ok. G

 

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